Evolutionary Mapping of Neural Networks to Spatial Accelerators
Abstract
Spatial accelerators, composed of arrays of compute-memory integrated units, offer an attractive platform for deploying inference workloads with low latency and low energy consumption. However, fully exploiting their architectural advantages typically requires careful, expert-driven mapping of computational graphs to distributed processing elements. In this work, we automate this process by framing the mapping challenge as a black-box optimization problem. We introduce the first evolutionary, hardware-in-the-loop mapping framework for neuromorphic accelerators, enabling users without deep hardware knowledge to deploy workloads more efficiently. On Intel's Loihi 2, our method achieves up to 35% reduction in total latency compared to default heuristics on two sparse multilayer perceptron networks. We further demonstrate the scalability of our approach to multi-chip systems and observe an up to 40% gain in energy efficiency, without explicitly optimizing for it.
Details
- Organisation(s)
-
Machine Learning Section
- External Organisation(s)
-
Ludwig-Maximilians-Universität München (LMU)
Intel Deutschland GmbH
Harvard University
Intel Corporation
Munich Center for Machine Learning (MCML)
German Research Centre for Artificial Intelligence (DFKI)
- Type
- Conference contribution
- Pages
- 329-337
- No. of pages
- 9
- Publication date
- 10.07.2026
- Publication status
- Published
- Peer reviewed
- Yes
- ASJC Scopus subject areas
- Artificial Intelligence, Computational Theory and Mathematics, Computer Science Applications, Control and Optimization, Logic
- Electronic version(s)
-
https://doi.org/10.1145/3795095.3805135 (Access:
Open
)
